1. Field
This disclosure relates generally to non-volatile memories (NVM), and more specifically, to NVM systems with error correction code (ECC).
2. Related Art
Non-volatile memories (NVMs) generally require special operations for program and erase and there is a limit to how many times these operations can be performed. Also a common memory type, flash, is erased in blocks. Thus memory cells that have been erased successfully may continue to be subjected to erase conditions while other memory cells are still being erased. These bits that are slow to erase may be referenced as slow bit. Some memory cells may be over-erased that then must be soft programmed to overcome the problems associated with over-erase such as excessive leakage as part of the embedded erase operation. Soft programming typically takes a relatively long time since it is done per address and with low bias. With more cells required to be soft programmed, it may eventually cause the embedded erase operation to fail to complete within the specified maximum time. Another issue that over time and perhaps tens of thousands of cycles, and even memory cells become weak or slow to erase. These latent weak memory cells are very difficult to detect until they actually become weak or slow to erase. Thus, it is not uncommon for them to occur well after the device has been placed in a product which may cause product failure. Product failure is very desirable to avoid under any circumstances but especially failure of an integrated circuit. This is not generally something that the user of the product can repair but the product must be returned and someone with special training and expensive equipment must do the repair assuming the repair is even worth doing in light of the cost of repair relative to the cost of the product.
Accordingly, there is a need for NVM systems to improve upon one or more of the issues raised above.